Forum Post: RE: Possible JPEG decoding bug
It works! This morning I tried to generate 4:4:4 JPGs with some of my graphic programs but the generated files are not compatible with the S7G2 codec (I got SSP_ERR_JPEG_UNSUPPORTED_PIXEL_FORMAT...
View ArticleForum Post: RE: Possible JPEG decoding bug
I used GIMP 2.8. When exporting a jpeg, in the advanced settings, clear the "Progressive" check box (This is because the JPEG Codec peripheral only supports baseline) and set the sub-sampling as 4:4:4.
View ArticleForum Post: Searching right product
Hello everyone, i need to sample 4 ADCs in parallel at 2-3Msps (so 8 - 12Msps at all) and store these values into memory to do some calculations and then sent the data to a host via TCP/IP or USB....
View ArticleForum Post: RE: SCI on SPI not working - giving bad values
Can you be more specific about the non-zero value? Is it the same every time? What happens if you send 0xFF? If you can capture the logic analyzer trace, you might see something that makes more sense....
View ArticleComment on GR-KURUMI e2studio project (template version V1.12)
Hi Yuuki-san. Thanks a lot for your support. OK I will try to work with the linker file and see if I can get it to fit within the 64Kb space.
View ArticleForum Post: RX210 RSK clock generation issue
Hi everyone, I am currently developing software that aims to run on 50MHz system clock. Peripheral Drive Generator (PDG2) file is linked to my project but this is only to help with board...
View ArticleForum Post: RE: Stuck at Instruction Synchronization Barrier (__ISB())
Just a note: Trace-X is available on the Gallery here: synergygallery.renesas.com/.../7
View ArticleForum Post: RE: RX210 RSK clock generation issue
just a quick question, have you coded the loop in machine code or C. If in C have you checked the machine code it produced. Non optimized code in GCC for instance can easily make a simple loop...
View ArticleComment on How I Easily Got Started Using the Renesas Synergy Platform
One thing that wasn't explained well was that the SPP includes an Evaluation License file, that's used when generating Synergy Projects. It allows for source level debug and single-stepping. A...
View ArticleWiki Page: Encrypted source files
Encrypted source files by Laboratori Elecsan I'm writing code that makes use of the JPEG decompression libraries, and on friday I was able to step through the encrypted source code (with diagonal...
View ArticleWiki Page: Synergy - Wiki
This is the main page. Until it is populated with links, refer to the Table of Contents on right to see what's on the WIKI.
View ArticleForum Post: Setting a RAM or DATA FLASH address
While setting an address bigger than 0xF0000 ( RAM DATA or DATA FLASH ) in a RL78, The compiller sets a warning while compilling this instruction: g_pMX_StAdr = (uint8_t *)0xFF9DFU; /* Set...
View ArticleForum Post: problem using certified STL for RL78-GC // prProblems when...
We have problems when comparing CRC result against calculated by IAR. The CRC generated by IAR is stored in -Z(CODE)CHECKSUM#00DF. -- FAULTY CASE: The FLAS addressing is not done correctly by the...
View ArticleForum Post: RE: Setting a RAM or DATA FLASH address
You can use the 16bit part of the RAM address, as 16bit data-acces (= near access) in case of RL78 means access to the highest 64KB Segment (- 0xF0000 - 0xFFFFF). Therefore writing g_pMX_StAdr =...
View ArticleForum Post: RE: problem using certified STL for RL78-GC // prProblems when...
Please check the declaration of the segment definition, the segment has to be declared as far segment: #pragma segment= "CHECKSUM" __far By using the correct declaration I cannot reproduce the issue...
View ArticleBlog Post: Getting Your Development on Target with the Right Renesas Synergy Kit
As an applications developer, it’s hard to beat the experience of downloading and launching a new software release. It’s like Christmas (or Hanukah for my Jewish tribe members). But there’s one thing...
View ArticleForum Post: RE: Stuck at Instruction Synchronization Barrier (__ISB())
If no threads are ready to run or active, or the threads in the system don't do much, then the kernel will wait for something to happen (i.e. an interrupt). It will execute the wfi instruction _WFI()...
View ArticleForum Post: RE: RX210 RSK clock generation issue
Thanks for your quick response Paul. I did some tests as you suggested and it definitely makes a difference. Optimization is affecting toggle time and with level 2 setting it reduces from 1ms to 400us...
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