Forum Post: RZ/A1L number allocatable FIFO buffers

Hi, in the RZ/A1L manual RZ/A1L R01UH0437EJ0200 Rev.2.00 May 25, 2015 1. on page  905 the number of allocatable buffers is described: Receive FIFO buffer: 8 FIFO buffers (up to 96 buffers allocatable to each) Transmit/receive FIFO buffer: 3 FIFO buffers per channel (up to 96 buffers allocatable to each) 2. on page 968 the register RSCAN0CFCCk is described: The meaning of the  value of the field  CFDC is CFDC = 0: number of messages 0 1: 4 2: 8 3: 16 4: 32 5:48 6: 64 7:128   Here the limit seems to be 128. 3. on page 958 the register RSCAN0RFCCx  is described. The table for RFDC is the same as above. The limit seems to be 128. Please let me know what is correct.