I think this is in the software user's manual, but even there it is not easy. The information is often hidden in notes to tables or the like. https://www.renesas.com/en-eu/doc/products/mpumcu/doc/rx_family/r01us0032ej0120_rxsm.pdf And calculation execution time on RX is at best a challenge. As you saw, alignment of branch destination causes differences. The same may happen with data alignment (e.g. in strcuctures when you use packed structures). You have different bus systems on the chip which run at different speed and have to be synchronized when data is transferred from one system to another, you have additional wait cycles for certain memory areas, ... .
↧