Thanks for your suggestions, FrankL. I'll respond to them in the same order. Correct memory location for IWDT interrupt vector: In my map file, my interrupt routine IWDT_Int is given the address 0xffc0ce4d, shown on the following line: _IWDT_Int 0xffc0ce4d 0x1b Code Gb WDT_functions.o [1] In memory, the IWDT interrupt 95 (in location 0x00000180 ) contains address 0xffc0ce4d , as shown: So, it looks like the vector is correct. PSW interrupt enable: Immediately after boot and whenever I checked it thereafter, PSW.I == 1 , as shown: So it looks like interrupts are enabled. I'm pretty sure nothing is periodically turning them off because there are no references to "PSW" in my user code. Interrupt request bit set in NMISR: After my IWDT timeout has elapsed (4.4 seconds), NMISR.IWDTST changes from 0 to 1, as shown: So it looks like the interrupt request is getting registered. Also, register IR095.IR changes to 1 as well. I changed the IWDT vector in "bsp_int_vect_tbl.c" back to the default function of BSP_IntHandler_095, and that doesn't work either. Can you think of anything else I might try? Thanks very much. Peter
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