Forum Post: DK-S7G2 External memory bus CS and SDRAM

For my design I am hoping to use both the external memory bus CS space to access an FPGA and SDRAM.  I will use one (or more) of the available CS4,5,6,7 address spaces to access the FPGA.  Are there any special considerations to use the CS spaces without affecting the reliability of the SDRAM accesses on the DK-S7G2 dev kit?  I just started playing with this yesterday and thought things were going well until I tried access the external SDRAM from my webserver this morning.  The board seemed to become very, very unstable until I disabled the enable switch S5-EXP.  I am not actually making any accesses to the CS spaces yet in software and I do not have any hardware connected to the J7,8,9,10 headers. Thanks. Tim